Microprocessors are powerful processing devices, but they are limited by present technology as to size and circuit density. As a result of these limitations certain desirable processor features such as memory management are presently provided by circuitry external to the microprocessor itself.
One of the important functions of memory management is the detection of memory protection violations. That is, the memory management circuitry determines when the microprocessor is attempting to access a location in protected memory and notifies the microprocessor so that appropriate action can be taken. In the prior art, this notification has been accomplished with a memory "exception" control signal. The memory management circuitry operates early in the microprocessor instruction decoding cycle so that a memory violation is detected early, the exception signal is returned, and the offending instruction is aborted before it can be completed. See, for example, the article by Lavi, et al, "16-bit Microprocessor Enters Virtual Memory Domain", Electronics, Apr. 24, 1980. The instruction aborting facility is described at pages 126-128.
In order for memory exception to operate as stated, the microprocessor must be designed from its inception to accept the exception signal and to abort instructions. Many microprocessors in current use, however, do not provide for a memory exception signal and are not capable of aborting instructions. It is desirable that these microprocessors, too, be provided with memory management features.
In the present invention, memory management is provided to the microprocessor by external circuitry that notifies the microprocessor of memory violations by means of a microprocessor "interrupt" signal. Currently available microprocessors are commonly provided with interrupt capabilities, so that the present invention finds utility for a large class of devices.
Unlike the memory exception, an interrupt can take place only at the end of an instruction execution cycle, so that any instruction causing memory violation is completely executed. The memory management circuitry blocks the access attempt by the instruction, then interrupts the microprocessor at the end of the execution cycle of the offending instruction. The interrupt program may then take steps to compensate for the actions taken by the offending instruction.
A particular problem with interrupt-driven memory management arises when the microprocessor is equipped to operate a push-down stack in memory for interrupt and other data. A push-down stack by its nature is extendible and may dynamically grow beyond the limited memory area set aside for stack use. The interrupt causes data to be placed on the push-down stack and may itself cause a memory violation. The interrupt process is non-interruptible so that the interrupt will go to completion and the interrupt data will be sent out to memory whether or not memory violations are occurring. The interrupt data is important if program sanity is to be maintained, but it cannot be written beyond the stack area because it may destroy other important data. Succinctly put, the problem attacked by the present invention is the problem of providing for interrupt stack overflow in an interrupt-driven memory protection system.